Product Summary

The ALVC164245 is a 16-bit (dual-octal) noninverting bus transceiver. The ALVC164245 contains two separate supply rails. B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa. The ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA. To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Parametrics

ALVC164245 absolute maximum ratings: (1)Supply voltage range, VCCA: -0.5 to 4.6 V; VCCB: -0.5 to 6V; (2)Input voltage range, Except I/O ports, VI: -0.5 to 6V; I/O port A, VI: -0.5 to VCCA +0.5V; I/O port B, VI: -0.5 to VCCB +0.5V; (3)Input clamp current, VI < 0, IIK: -50 mA; (4)Output clamp current, VO < 0, IOK: -50 mA; (5)Continuous output current, IO: ±50 mA; (6)Continuous current through each VCC or GND: ±100 mA; (7)Package thermal impedance, DGG package, θJA: 70℃/W; (8)Storage temperature range, Tstg: -65 to 150℃.

Features

ALVC164245 features: (1)Member of the Texas Instruments Widebus Family; (2)Max tpd of 5.8 ns at 3.3 V; (3)±24-mA Output Drive at 3.3 V; (4)Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage; (5)Latch-Up Performance Exceeds 250 mA Per JESD 17.

Diagrams

ALVC164245 circuit diagram

ALVCH16832DGG
ALVCH16832DGG

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Registers 1TO4BIT ADDRES DRV 3ST OUTPUTS

Data Sheet

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Data Sheet

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ALVCH16832DGG-T
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Registers 1TO4BIT ADDRES DRV 3ST OUTPUTS

Data Sheet

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